GTronix History and Founding Team

Dr. Jeff Dugger , Dr. Matt Kucic , Dr. Paul Hasler, and Dr. Paul Smith founded GTronix in 2002 to commercialize low-power analog computation technology developed in the Integrated Computational Electronics (ICE) lab at Georgia Tech. The 4 co-founders developed initial collateral for investor pitches with help from Georgia Tech's Venture Lab and obtained funding from Silicon Valley investment firm Menlo Ventures. GTronix opened its Fremont, California headquarters shortly after receiving initial funding in 2004. Utilizing connections through Georgia Tech and Menlo Ventures, the founders assembled an executive team to help commercialize the core technology. GTronix opened a Design Center in Dallas in 2006. Since 2004, GTronix has received venture funding and has attracted seasoned executive talent from Fairchild, Altera, National Semiconductor, and other successful startups such as Ikanos.

GTronix applies proprietary programmable analog technology and novel design techniques to realize sophisticated DSP algorithms in analog integrated circuits yielding smaller, lower-power solutions than traditional DSP implementations. The company’s initial product line breaks new ground in analog performance and programmability with the lowest power beamsteering solution on the market.

GTronix in the news:

"Startup GTronix offers smart analog, aims at portable consumer electronics market"

Electronics Design News, 9/18/2006.

http://www.edn.com/index.asp?layout=article&articleid=CA6373097&partner=eb

Jeff D. Dugger, Ph.D.

Dr. Dugger co-founded GTronix in 2002, where he currently leads signal processing, overseeing algorithm and architecture development to adapt advanced DSP applications for analog VLSI implementation. He recruited and built the algorithm and architecture team at GTronix and manages that team to perform feasibility studies, develop signal processing algorithms appropriate to GTronix analog technology, build computer models of the resulting architectures, and provide support for the circuit design team throughout development. Dr. Dugger designed and developed the signal processing algorithms behind each of the company’s products leading to GTronix’ first revenue.

Dr. Dugger earned his Ph.D. from the Georgia Institute of Technology in 2003. His thesis, Analog VLSI Signal Processing and Neural Networks, explored novel applications of continuously adapting floating-gate circuits for on-chip learning. This work required taking fundamental machine-learning algorithms from mathematical concept to physical integrated circuit implementation, through algorithm analysis, analog circuit design, simulation, chip layout, and bench testing.

Dr. Dugger has co-authored 2 book chapters has published 2 journal papers, 9 conference publications and holds one patent with one patent pending.

Paul E. Hasler, Ph.D.

Dr. Hasler co-founded GTronix in 2002, where he is currently Chief Science Officer and a member of the board of directors.

Dr. Hasler is an Associate Professor in the School of Electrical and
Computer Engineering at Georgia Institute of Technology, and has been with Georgia Tech since 1997.  Dr. Hasler received his M.S. and B.S.E. in
Electrical Engineering from Arizona State University in 1991, and received
his Ph.D. from the California Institute of Technology in Computation and Neural Systems in 1997.  

His current research interests include low-power electronics, mixed-signal system ICs, floating-gate MOS transistors, adaptive information processing systems, "smart" interfaces for sensors, cooperative analog-digital signal processing, device physics related to submicron devices or floating-gate devices, and analog VLSI models of on-chip learning and sensory processing in neurobiology.  

Dr. Hasler received the NSF CAREER Award in 2001 and the ONR YIP award in 2002.  Dr. Hasler received the Paul Raphorst Best Paper Award, IEEE Electron Devices Society, 1997, IEEE CICC best paper award, 2005, Best student paper award, IEEE Ultrasound Symposium, 2006, and IEEE ISCAS Sensors best paper award, 2005.

Dr. Hasler is a Senior Member of the IEEE, a member of the Institute for Neural Engineering (INE), and on the organizing committee for the Telluride Neuromorphic Engineering workshop. Dr. Hasler's research has led to over 200 publications and over 20 patents or currently reviewed patents.

Matt R. Kucic, Ph.D.

Dr. Kucic co-founded GTronix in 2002, where he currently leads non-volatile and process technology development at GTronix, overseeing all aspects of the company's core technology and processes. He built the technology team to manage the advancement of the company's core technology offering through feasibility studies and advanced modeling to support the circuit design team throughout development.

Dr. Kucic focuses mainly on programming infrastructure to enable large arrays of non-volatile analog floating-gate devices in analog computational systems. He also contributes to advanced research of signal processing architectures, as well as the design, development, and testing of each of the company’s first revenue-generating products.

Leveraging his background in network engineering at Intel and Georgia Tech, Dr. Kucic built and manages GTronix' robust multi-site CAD environment as well as providing all other enterprise-level IT services in a start-up environment.

Dr. Kucic has written 12 journal and conference publications, held 6
presentations/tutorials, and holds 3 patents with additional patents pending.

Paul D. Smith, Ph.D.

Dr. Smith co-founded GTronix in 2002, where he currently leads circuit and system architecture and designed the core circuits driving GTronix' first revenue-generating product line. Dr. Smith oversees translation of architectures and algorithms into analog circuits, spec requirements, and circuit development. He worked on-site to build GTronix Dallas Design Center from 2-6 engineers while leading and training them on the company’s specific proprietary low-power design techniques. Dr. Smith acts as Program Manager for advanced research projects with two universities which he manages and advises to ensure delivery of robust low-power solutions that strengthen and are aligned with the company’s long-term product roadmap and technology strategy.

Dr. Smith earned a Ph.D. from the Georgia Institute of Technology in 2004. His thesis work in Analog VLSI Speech Recognition Architecture explored novel analog architectures for Automatic Speech Recognition.

Dr. Smith has knowledge and experience taking concepts from spec and definition to circuits and into volume production. He also has experience obtaining venture funding, and starting a technology based company. His technical expertise is in the following: low-power analog system design, semiconductor physics, CMOS programmable filter design, system architecture design, low-noise circuit design and layout, bio-insipred system design, neuro-biological system understanding (neurobiology), digital design, DSP/FPGA coding, system testing (PCB/custom), C-code, and Matlab.

Dr. Smith has published 4 journal and 14 conference papers. He also holds two patents with two patents pending.