System on Chip (SoC) large-scale Field-Programmable Analog Array
Lead Professor: Dr. Jennifer Hasler
 S. George, S. Kim, S. Shah, et. al, "A Programmable and Configurable Mixed-Mode FPAA SOC,” IEEE Transactions on VLSI, 2016.
 M. Collins, J. Hasler, and S. George, "An Open-Source Toolset Enabling Analog–Digital–Software Codesign," Journal of Low Power Electronics Applications, January 2016.
 J. Hasler, S. Kim, S. Shah, F. Adil, M. Collins, S. Koziol, and S. Nease, "Transforming Mixed-Signal Circuits Class through SoC FPAA IC, PCB, and Toolset," European Workshop on Microelectronics Education, Southampton, May 2016.
 M. Collins, J. Hasler, and S. Shah, "An approach to using RASP tools in analog systems education," FIE , October 2016.
 J. Hasler, S. Shah, S. Kim, I. Lal, and M. Collins, "Remote FPAA System Setup Enabling Wide Accessibility of Configurable devices," Journal of Low Power Electronics Applications, June 2016.
 S. Kim, J. Hasler, and S. George, "Integrated Floating-Gate Programming Environment for System-Level Ics," IEEE Transactions on VLSI , 2016.
 J. Hasler, S. Shah, S. Kim, I. K. Lal, and M. Collins, "Remote System Setup Using Large-Scale Field Programmable Analog Arrays (FPAA) to Enabling Wide Accessibility of Configurable Devices," Journal of Low Power Electroncs Applicatyyions, vol. 6, no. 14, 2016, pp. 1-17.
 J. Hasler, S. Kim, and F. Adil, "Scaling Floating-Gate Devices Predicting Behavior for Programmable and Configurable Circuits and Systems," Journal of Low Power Electroncs Applicatyyions, vol. 6, no. 13, 2016, pp. 1-19.
 S. Shah, H. Treyin, O. T. Inan, and J. Hasler, “Reconfigurable analog classifier for knee-joint rehabilitation,” IEEE EMBC , August 2016.
 S. Shah, C. N. Teague, O. T. Inan, and J. Hasler, “A proof-of-concept classifier for acoustic signals from the knee joint on an FPAA,” IEEE SENSORS, October 2016.
 A. Natarajan and J. Hasler, ``Modeling, simulation and implementation of circuit elements in an open-source tool set on the FPAA,'' Analog Integrated Circiuits and Signal Processing, vol. 91, no. 1, January 2017, pp. 119-130.
 S. Shah and J. Hasler, "Tuning of Multiple Parameters With a BIST System," IEEE CAS I, vol. 64, no. 7, July 2017, pp. 1772-1780.
 S. Kim, S. Shah, and J. Hasler, "Calibration of Floating-Gate SoC FPAA System," IEEE Transactions on VLSI , 2017.
 Electronic Product Magazine, March 21, 2016. "New analog chip uses 1,000 times less electrical power (and can be built a hundred times smaller) than comparable digital devices"