SoC FPAA Routing Discussion

The figure below shows the basic Manhattan based routing structure used for our SoC FPAA device. The routing fabric in this architecture is both useful for computation as well as switching, particularly for local CAB / CLB routing as well as in the "C" block routing.


Manhattan FPAA architecture, including the array of computation blocks and routing, composed of Connection (C) and Switch (S) blocks. The routing infrastructure can effectively be modeled as a distributed RC line. The lowest figure shows a typical routing fabric assuming a single routing of C and S block switches, where Cc is the connection capacitance including the C block lines, Rc is the C block switch resistance, and Rs is the unbuffered S block switch resistance. m = typical number of switches needed for a connection.

The SoC FPAA enables programming experiments that characterize the fundamental properties of the configurable fabric by experimental measurements on the configurable routing fabric. The figure below illustrates compiling (and measuring) two circuits to characterize precisely the behavior of these circuits, including load capacitance of the fabric itself. This FPAA structure facilitates the direct characterization of the resulting capacitance. One can directly predict delays along each of these lines. Every experiment uses the same voltage biasing, fixing the capacitance of p-n junction devices throughout this experiment. The resulting measurements give a measurement of the resulting routing capacitance, as well as enables, through the routing fabric, a range of tunable capacitor blocks. Precise measurement of routing capacitances enables tuning, through programming switches, for precise capacitances where needed for matching. Matching of capacitances and programmability of current sources by FG techniques dramatically reduces the effect of mismatch in small cell sizes.


FPAA characterization of routing capacitances. Initially, one first measures the current-voltage relationship for a specific OTA device, shown in the inset, to exactly find the resulting Gm (0.1547uA/V) of the device. That exact OTA with the same programmed current is used to measure the time-constant of the step response (on a 1.2V dc for the 2.5V supply) for different (additive) routing combinations. From the step responses measurement shown, a linear curve (in log amplitude) fits to the time constant after removing the effect of the steady state voltage. The extracted routing capacitance values for multiple measurement configurations are summarized.

The minimum capacitance for routing through a single "S" block would be routing through a local line (160fF) , plus a "C" block line (160fF), plus an "S" block line (40fF), plus a "C" block line (160fF), and then another local line (160fF). This value would be 680fF (roughly 700fF would make sense). This would be the minimum capacitance for setting up the routing.