Is that layout on those tiles?
Welcome to the ICE Laboratory Site @ GT
The lab has two current focus directions:
From these two areas of focus, we research
analog and digital integrated circuits and systems design,
CMOS device physics.
- Programmable and configurable,
analog and digital,
circuits, signal processing, algorithms, and systems
- Neuromorphic Engineering
Lead Professor: Dr. Jennifer Hasler
Topically Organized Publications
Recent Courses Taught
Potential Senior Design /
Graduate Special Problems
on the importance of the Faculty--Ph.D. Student Mentoring Relationship
(GT press: April 11, 2016)
Programmability and Configurability
We want to have
systems based on neuroscience,
to perform biological like tasks,
and thereby contribute to neuroscience understanding.
large-scale Field Programmable Analog Arrays (FPAA).
First System on Chip (SoC) FPAA
Integrated Circuit 
- FPAA design tools .
- FPAA board design / Educational Applications.
- Floating-gate programming.
SoC FPAA programming infrastructure .
of Floating-Gate Devices (350nm to 40nm)
and Resulting FPAA architecture scaling .
- FPAA classifier applications towards biomedical applications.
1 , and
- Built-In Self
Test initial paper 
- Press articles on the SoC FPAA and infrastructure
Electronic Products 
GT press .
References : |
 S. George, S. Kim, S. Shah, et. al,
"A Programmable and Configurable Mixed-Mode FPAA SOC,”
IEEE Transactions on VLSI, 2016.
 M. Collins, J. Hasler, and S. George,
"An Open-Source Toolset Enabling Analog–Digital–Software Codesign,"
Journal of Low Power Electronics Applications, January 2016.
J. Hasler, S. Kim, S. Shah, F. Adil, M. Collins, S. Koziol, and S. Nease,
"Transforming Mixed-Signal Circuits Class through SoC FPAA IC, PCB, and Toolset,"
European Workshop on Microelectronics Education, Southampton, May 2016.
M. Collins, J. Hasler, and S. Shah,
"An approach to using RASP tools in analog systems education,"
FIE , October 2016.
J. Hasler, S. Shah, S. Kim, I. Lal, and M. Collins,
"Remote FPAA System Setup Enabling Wide Accessibility of Configurable devices,"
Journal of Low Power Electronics Applications, June 2016.
 S. Kim, J. Hasler, and S. George,
"Integrated Floating-Gate Programming Environment for System-Level Ics,"
IEEE Transactions on VLSI , 2016.
 J. Hasler, S. Shah, S. Kim, I. K. Lal, and M. Collins,
"Remote System Setup Using Large-Scale Field Programmable Analog Arrays (FPAA) to Enabling Wide Accessibility of Configurable Devices,"
Journal of Low Power Electroncs Applicatyyions, vol. 6, no. 14, 2016, pp. 1-17.
 J. Hasler, S. Kim, and F. Adil,
"Scaling Floating-Gate Devices Predicting Behavior
for Programmable and Configurable Circuits and Systems,"
Journal of Low Power Electroncs Applicatyyions, vol. 6, no. 13, 2016, pp. 1-19.
S. Shah, H. Treyin, O. T. Inan, and J. Hasler,
“Reconfigurable analog classifier for knee-joint rehabilitation,”
IEEE EMBC , August 2016.
S. Shah, C. N. Teague, O. T. Inan, and J. Hasler,
“A proof-of-concept classifier for acoustic signals
from the knee joint on an FPAA,” IEEE SENSORS, October 2016.
A. Natarajan and J. Hasler,
``Modeling, simulation and implementation of circuit elements
in an open-source tool set on the FPAA,''
Analog Integrated Circiuits and Signal Processing,
 S. Shah and J. Hasler,
IEEE CASI, 2017.
 Electronic Product Magazine, March 21, 2016.
"New analog chip uses 1,000 times less electrical power (and can be built a hundred times smaller) than comparable digital devices"
References : |
 J. Hasler, H. B. Marr,
"Finding a Roadmap to achieve Large Neuromorphic Hardware Systems,"
Frontiers in Neuroscience, vol. 7, no. 118, September 2013. pp. 1-29.
 J. Hasler,
“Opportunities in Physical Computing driven by Analog Realization,”
IEEE IC Rebooting Computing , San Deigo, October 2016.
 H. B. Marr and J. Hasler,
"Compiling probabilistic, bio-inspired circuits on a
field programmable analog array,"
Frontiers in Neuroscience, 2015. pp. 1-9.